# DPU and SmartNIC A network adapter used to move packets. A data processing unit is an adapter with its own processors, memory, and programmable packet-handling engine, able to run the infrastructure functions that previously consumed host cycles: networking, storage access, encryption, and isolation. It is a small computer attached to the network whose job is to let the big computer concentrate on its own work. > [!note] The one-sentence version > Put processors on the network card and let it run the plumbing, so the host's processors can be spent on what the customer is paying for. ## Why it exists In a cloud server a significant share of processor capacity goes to infrastructure rather than to the tenant's work: virtual switching, overlay network encapsulation, storage protocol handling, encryption, telemetry, and policy enforcement. At high line rates that share becomes large. Moving those functions onto the adapter recovers host capacity, and it does something further that matters more: it places the infrastructure functions on silicon the tenant does not control, which is a clean security boundary rather than a software convention. ## Prerequisites - **Data plane and control plane:** the per-packet forwarding work, against the logic that decides the rules; adapters accelerate the first and increasingly host the second too. - **Programmable packet pipeline:** match-action hardware configured by a program rather than fixed in silicon, often written in a dedicated language for the purpose. A low-latency programmable engine of this kind is what distinguishes a modern adapter from a fixed-function one. - **Embedded processors:** general-purpose cores on the adapter running an operating system of its own, independent of the host. - **Offload:** performing in hardware what would otherwise consume host cycles; common examples include checksum, segmentation, encryption, and the direct memory access paths behind remote access; see [[wiki/RDMA|RDMA]]. - **Infrastructure isolation:** running the provider's functions on the adapter so that the host is wholly available to the tenant and the two do not share a software surface. ## What it does in this stack - **Remote direct memory access** at full line rate, which is the fabric capability every collective depends on; see [[wiki/Collective Communication|Collective Communication]]. - **Congestion control and telemetry** in hardware at the endpoint, which is where modern congestion algorithms actually run; see [[wiki/Congestion Control|Congestion Control]]. - **Storage access,** presenting remote flash as if local and handling the protocol on the adapter; see [[wiki/NVMe over Fabrics|NVMe over Fabrics]]. - **Encryption in flight,** at line rate, so that traffic between racks and between facilities is protected without host cost. - **Tenant isolation and policy,** enforced on the adapter, which is a central mechanism for offering dedicated machines to customers without the provider's software running inside them; see [[wiki/Bare Metal Compute|Bare Metal Compute]] and [[wiki/Confidential Computing|Confidential Computing]]. - **Bare-metal provisioning,** where the adapter presents boot devices and network configuration so a machine can be reset and re-imaged cleanly between tenants. ## Why it became a category The pattern is familiar from the rest of this collection: a function performed in general-purpose software becomes important enough and repetitive enough that it is worth dedicated silicon. Graphics did it, machine learning did it, and infrastructure networking did it. Several vendors now ship adapters with programmable engines and embedded processors, acquired or built specifically for this purpose, and the programmable low-latency data plane is treated as a competitive asset rather than a commodity component. The strategic reading is that the control points in a cloud are moving into hardware, and whoever supplies that hardware holds a position in how the facility is operated. ## Relationships - **accelerates:** [[wiki/RDMA|RDMA]] · [[wiki/Congestion Control|Congestion Control]] · [[wiki/NVMe over Fabrics|NVMe over Fabrics]] - **relieves:** [[wiki/Host CPU|Host CPU]] - **attached by:** [[wiki/PCIe|PCIe]] - **enables:** [[wiki/Bare Metal Compute|Bare Metal Compute]] · [[wiki/Confidential Computing|Confidential Computing]] · [[wiki/Data Center Security|Data Center Security]] - **part of:** [[wiki/Rack and Cluster Integration|Rack and Cluster Integration]] - **source articles:** [[articles/Vertically Integrating an AI Superpower from AI Factory to Citizen|Vertically Integrating an AI Superpower from AI Factory to Citizen]] · [[articles/The Gigawatt Is the New Measure of War|The Gigawatt Is the New Measure of War]] - **collection route:** [[collections/American Infrastructure|American Infrastructure]] · [[collections/American|American Collection]] ## Evidence posture - **Established:** the host processor cost of infrastructure functions at high line rates; programmable match-action packet pipelines configured by dedicated languages; embedded general-purpose processors running an independent operating system on the adapter; hardware offload of checksum, segmentation, encryption, and direct memory access; adapter-enforced tenant isolation and bare-metal provisioning. - **Established:** multiple vendors shipping programmable low-latency data-plane adapters, including capability acquired specifically for this purpose, and treating that engine as a competitive differentiator. - **Strongly indicated:** infrastructure control points migrating into adapter hardware as a durable industry direction; product and architecture statements support it and long-run share data is still accruing. ## Sources - [Helios Is AMD's First AI System To Rival Nvidia Vera Rubin](https://www.cnbc.com/) — CNBC, October 2026; a programmable low-latency networking engine acquired in 2022 and presented as a differentiating capability. - Public adapter and infrastructure-processor documentation, as of October 2026.