# High Bandwidth Flash **Aliases:** HBF **Entity class:** AI-oriented memory architecture and proposed standard **Domain:** Semiconductor memory / AI infrastructure **Doc Type:** Developed Technology Node **Maturity:** Emerging **As of:** 2026-09-20 ## Definition **High Bandwidth Flash (HBF)** is an emerging memory tier intended to combine the capacity and nonvolatility of [[wiki/NAND Flash|NAND flash]] with bandwidth and packaging approaches suited to AI inference. SanDisk and SK hynix announced global standardization work in February 2026 and introduced an initial Open Compute Project specification later that year. ## Substrate Context HBF carries the 1967 [[wiki/Floating Gate|floating-gate]] lineage into AI systems whose inference workloads require very large model capacity near accelerators. It represents memory architecture reorganized around machine-intelligence demand. ## Evidence Ledger - **Established:** SanDisk and SK hynix publicly announced HBF collaboration and standardization in 2026. - **Established:** The stated target is high-capacity, high-bandwidth memory for AI-era workloads. - **Strongly indicated:** HBF makes the connection between nonvolatile memory history and machine-intelligence infrastructure explicit. - **Unresolved:** Commercial adoption, final standard form, and performance at scale. Product shipments, OCP ratification, and independent benchmarks will promote or demote the present claims. ## Sources / Provenance - [SanDisk and SK hynix HBF announcement (2026)](https://www.sandisk.com/company/newsroom/press-releases/2026/2026-02-25-sandisk-and-sk-hynix-begin-global-standardization-of-next-generation-memory-solution-high-bandwidth-flash-hbf). - [[articles/A History of Machine Intelligence|A History of Machine Intelligence]]. ## Relationships - **Extends:** [[wiki/NAND Flash|NAND Flash]] and [[wiki/Floating Gate|Floating Gate]]. - **Supports:** AI inference infrastructure within [[wiki/Substrate Intentionality|Substrate Intentionality]].