High-Bandwidth Memory - Bryant McGill

# High-Bandwidth Memory **Entity class:** Computing hardware **Domain:** Semiconductors / artificial intelligence **Maturity:** Developed ## Definition High-bandwidth memory is a stacked memory architecture designed to move large quantities of data between memory and processors with very high bandwidth. ## Mechanism and significance AI accelerators depend on memory bandwidth to keep computation supplied with model weights, activations, and intermediate state. Shortages or architectural dependence can therefore constrain deployment even when accelerator arithmetic is available. ## Relationships - [[wiki/Memory Architecture|Memory Architecture]] - [[wiki/Compute Scarcity|Compute Scarcity]] - [[wiki/NVIDIA|NVIDIA]] - [[wiki/Moonshots - The Coming Manhattan Project|Moonshots — The Coming Manhattan Project]] ## Sources and provenance - [[research/All Things Superintelligence Research - The Coming Manhattan Project - Moonshots|All Things Superintelligence Research — The Coming Manhattan Project — Moonshots]] — episode transcript, reconciled against the preserved ElevenLabs timing layer. - [[research/All Things Superintelligence Research - The Coming Manhattan Project - Moonshots - Reminder and Wiki Preparation|Reminder and Wiki Preparation]] — coherent-thought ledger and evidence boundaries. ## Evidence boundary Memory is one bottleneck among power, networking, fabrication, packaging, software, and capital. The source’s claim that all progress is RAM-bound is a speaker’s emphasis, not a settled universal diagnosis. ## Simple Reminders, Quotations, and Thoughts > AI deployment can become constrained by memory rather than models. When startups become valuable because they route around high-bandwidth-memory bottlenecks, RAM architecture is no longer a supporting detail; it is part of the capability frontier. > **— Adapted from Dave Blundin**, *Moonshots, October 7, 2026* [[reminders/AI Infrastructure/RAM Can Become the Binding Constraint on AI Deployment by Dave Blundin|RAM Can Become the Binding Constraint on AI Deployment by Dave Blundin]]  ## American Infrastructure Route This entry is routed through [[collections/American Infrastructure|American Infrastructure]], the collection covering the physical and institutional construction of machine intelligence from the transistor to the town meeting, and across to [[collections/American|the American Collection]], which supplies the standard of conduct the same project is held to. The layer routers are [[wiki/Upstream Industrial Foundation|Upstream Industrial Foundation]], [[wiki/Electrical Supply and Reliability|Electrical Supply and Reliability]], [[wiki/Facilities and Thermal Management|Facilities and Thermal Management]], [[wiki/Rack and Cluster Integration|Rack and Cluster Integration]], [[wiki/Data Fabric and Storage|Data Fabric and Storage]], [[wiki/Compute and Accelerator Systems|Compute and Accelerator Systems]], [[wiki/Software and Orchestration|Software and Orchestration]], and [[wiki/Intelligence Delivery|Intelligence Delivery]]; the civic argument is carried by [[wiki/The American Buildout|The American Buildout]] and [[wiki/National Compute Capacity|National Compute Capacity]]. **Source articles:** [[articles/Vertically Integrating an AI Superpower from AI Factory to Citizen|Vertically Integrating an AI Superpower from AI Factory to Citizen]] · [[articles/The Gigawatt Is the New Measure of War|The Gigawatt Is the New Measure of War]]