# Intel 80170NX ETANN **Aliases:** Electrically Trainable Analog Neural Network; ETANN **Entity class:** Neural-network integrated circuit **Domain:** Neural hardware / semiconductor history **Doc Type:** Developed Technology Node **Maturity:** Developed ## Definition The **Intel 80170NX ETANN** was an electrically trainable analog neural-network chip introduced in 1989. It implemented 64 artificial neurons and 10,240 adaptive synapses in silicon, using nonvolatile floating-gate charge to store weights. ## Historical Role The ETANN made neural computation a physical Intel product years before the deep-learning era. A 1987–1988 Caltech meeting involving [[wiki/Carver Mead|Carver Mead]] and Intel's Bruce McCormick contributed to the design exchange behind the program. Intel later followed the ETANN with the Ni1000 pattern-recognition processor developed with Nestor. ## Evidence Ledger - **Established:** Intel fabricated and marketed the 80170NX ETANN in 1989 with 64 neurons and 10,240 floating-gate synapses. - **Strongly indicated:** The chip forms part of Intel's continuous neural-hardware history leading toward Loihi and Hala Point. - **Plausible:** The Caltech–Intel exchange transmitted Mead's neuromorphic program directly into the product architecture. - **Unresolved:** The precise contribution of each participant and meeting. Intel and Caltech archives, design notebooks, and correspondence would settle the allocation. ## Sources / Provenance - [Computer History Museum, “Neural Network Chip Joins the Collection”](https://computerhistory.org/blog/neural-network-chip-joins-the-collection/). - [[articles/A History of Machine Intelligence|A History of Machine Intelligence]]. ## Relationships - **Built by:** [[wiki/Intel|Intel]]. - **Uses:** [[wiki/Floating Gate|Floating Gate]] synaptic weights. - **Receives from:** [[wiki/Carver Mead|Carver Mead]] and Caltech's neuromorphic lineage. - **Supports:** [[wiki/Substrate Intentionality|Substrate Intentionality]].