# NAND Flash **Entity class:** Nonvolatile semiconductor memory architecture **Domain:** Semiconductor memory / storage / AI infrastructure **Doc Type:** Developed Technology Node **Maturity:** Developed ## Definition **NAND flash** is a nonvolatile memory architecture developed at Toshiba under Fujio Masuoka in the 1980s. It arranges floating-gate or charge-trap cells so that high-density storage can be produced at scale. ## Machine-Intelligence Context NAND flash carries the [[wiki/Floating Gate|floating-gate]] lineage into mass storage and into the emerging [[wiki/High Bandwidth Flash|High Bandwidth Flash]] tier designed for AI inference. NAND is also logically significant: a McCulloch–Pitts threshold unit can compute the NAND function, and NAND is functionally complete for Boolean computation. ## Evidence Ledger - **Established:** Toshiba's Masuoka team developed NAND flash and presented it in the 1980s. - **Established:** NAND became a dominant high-density nonvolatile memory architecture. - **Strongly indicated:** HBF carries NAND into a memory tier explicitly designed around AI workload bandwidth and capacity. - **Unresolved:** Whether the formal-neuron/NAND correspondence influenced any memory-architecture decision; design records would promote or demote that proposition. ## Sources / Provenance - [SanDisk and SK hynix, High Bandwidth Flash standardization announcement (2026)](https://www.sandisk.com/company/newsroom/press-releases/2026/2026-02-25-sandisk-and-sk-hynix-begin-global-standardization-of-next-generation-memory-solution-high-bandwidth-flash-hbf). - [[articles/A History of Machine Intelligence|A History of Machine Intelligence]]. ## Relationships - **Descends from:** [[wiki/Floating Gate|Floating Gate]]. - **Reorganized as:** [[wiki/High Bandwidth Flash|High Bandwidth Flash]]. - **Participates in:** [[wiki/Substrate Intentionality|Substrate Intentionality]].