# NVIDIA ConnectX-8 A cluster fabric terminates in an adapter, and the adapter does far more than move packets. It performs remote memory operations at line rate without involving the host processor, runs the congestion control that decides whether the fabric survives a synchronized burst, and increasingly handles storage, encryption, and tenant isolation on silicon the host does not control. > [!note] The one-sentence version > The silicon at the end of the wire, which does the memory operations, the congestion control and the isolation so the host processors can stay on the work. ## What it does **Remote direct memory access** at full line rate, writing into a remote machine's memory without that machine's processor participating; this is the capability on which every collective and every parallel storage system depends; see [[wiki/RDMA|RDMA]]. **Congestion control at the endpoint.** Modern congestion algorithms run in adapter hardware, reacting in microseconds to marks and delay measurements. This is where the difference between a fabric that performs and one that collapses under a specific traffic pattern actually lives; see [[wiki/Congestion Control|Congestion Control]]. **Protocol support for both fabric families,** so the same adapter generation serves InfiniBand and enhanced Ethernet deployments; see [[wiki/InfiniBand|InfiniBand]] and [[wiki/Ultra Ethernet|Ultra Ethernet]]. **Direct accelerator access,** moving data between the network and accelerator memory without staging through host memory at all, which is the mechanism behind the highest-throughput data paths in a facility; see [[wiki/Accelerator|Accelerator]] and [[wiki/Parallel File System|Parallel File System]]. **Infrastructure offload,** including storage protocol handling, line-rate encryption, and tenant isolation enforced outside the host's software; see [[wiki/DPU and SmartNIC|DPU and SmartNIC]] and [[wiki/Bare Metal Compute|Bare Metal Compute]]. ## Why the adapter count matters In rail-optimized clusters there is one adapter per accelerator rather than per server, so adapters, transceivers, switch ports, and fiber all scale with accelerator count; see [[wiki/Network Fabric Topology|Network Fabric Topology]]. A cluster of tens of thousands of accelerators therefore contains tens of thousands of adapters and several times that many optical modules, which is why endpoint silicon and optics economics are first-order concerns rather than details; see [[wiki/Data Center Optics|Data Center Optics]]. ## Relationships - **terminates:** [[wiki/InfiniBand|InfiniBand]] · [[wiki/Ultra Ethernet|Ultra Ethernet]] · [[wiki/NVIDIA Quantum|NVIDIA Quantum]] - **performs:** [[wiki/RDMA|RDMA]] · [[wiki/Congestion Control|Congestion Control]] - **attached by:** [[wiki/PCIe|PCIe]] - **relieves:** [[wiki/Host CPU|Host CPU]] - **class of:** [[wiki/DPU and SmartNIC|DPU and SmartNIC]] - **part of:** [[wiki/Rack and Cluster Integration|Rack and Cluster Integration]] - **source articles:** [[articles/Vertically Integrating an AI Superpower from AI Factory to Citizen|Vertically Integrating an AI Superpower from AI Factory to Citizen]] · [[articles/The Gigawatt Is the New Measure of War|The Gigawatt Is the New Measure of War]] - **collection route:** [[collections/American Infrastructure|American Infrastructure]] · [[collections/American|American Collection]] ## Evidence posture - **Established:** line-rate remote direct memory access without host processor involvement; hardware congestion control at the endpoint; support for both lossless fabric families in one adapter generation; direct transfer between network and accelerator memory without host staging; infrastructure offload including storage protocol, encryption, and tenant isolation; one adapter per accelerator in rail-optimized clusters. - **Established:** published building blocks specifying accelerator-cluster fabric interfaces at substantially higher aggregate rates than ordinary host connectivity. ## Sources - Public network adapter documentation and cluster fabric deployment practice, as of October 2026.